In view of low bandwidth and pin efficiency in Dieto Die (D2D) of high performance CPU, GPU, AI and other high end chips, a 125 Gb/s transmitter with low power consumption with high pin efficiency for ultra short reach (USR) is proposed. To improve pin efficiency, this circuit adopts correlated non return to zero (CNRZ) encoding technology. To reduce the transmitter’s power consumption, this paper adopts a precoding soucre series terminated（SST） driver technology. To solve the problem of high power consumption of traditional two stage 2∶1 MUX, this paper adopts a CMOS 4∶1 MUX technology. This transmitter is designed with 28 nm CMOS technology and supplied with 0.9 V voltage. The simulation results show that when the transmitter based on CNRZ technology works at 125 Gb/s, the minimum eye width of the output signal can reach 0.41 UI (1 UI=40 ps), and the system power consumption is 1.1 pJ/bit, the pin efficiency increases from 5bit/10wire to 5bit/6wire.